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* qualification standards c an be found on ir?s web site www.irf.com ? 2008 international rectifier november 19, 2010 IRS2001MPBF high and low side driver features ? floating channel designed for bootstrap operation ? fully operational to +200v ? tolerant to negative transient voltage, dv/dt immune ? gate drive supply range from 10v to 20v ? undervoltage lockout ? 3.3v, 5v, and 15v logic compatible ? cross-conduction prevention logic ? matched propagation delay for both channels ? outputs in phase with inputs ? leadfree, rohs compliant description the irs2001 is a high voltage, high speed power mosfet and igbt driver with dependent high and low side referenced output channels. proprietary hvic and latch immune cmos technologies enable ruggedized monolithic construction. the logic input is compatible with standard cmos or lsttl output, down to 3.3v logic. the output drivers f eature a high pulse current buffer stage designed for minimum driver cross- conduction. the floating channel can be used to drive an n-channel power mosfet or igbt in the high side configuration which operates up to 200v. product summary topology general driver v offset 200v v out 10v ? 20v i o+ & i o- (typical) 290ma & 600ma t on & t off (typical) 160ns & 150ns delay matching (max.) 50ns package options mlpq4x4 - 16 leads (without 2 leads) typical connection
IRS2001MPBF www.irf.com ? 2008 international rectifier 2 qualification information ? industrial ?? (per jedec jesd 47) qualification level comments: this ic has passed jedec?s industrial qualification. ir?s consumer qualification level is granted by extension of the higher industrial level. moisture sensitivity level mlpq4x4 14l msl2 ??? (per ipc/jedec j-std-020) machine model class a (+/-200v) (per jedec standard jesd22-a115a) human body model class 1c (+/-2000v) (per jedec standard jesd22-a114f) esd charged device model class iii (+/-1000v) (per jedec standard jesd22-c101d) ic latch-up test class ii, level b (per aec-q100-004) rohs compliant yes ? qualification standards can be found at international rectifier?s web site http://www.irf.com/ ?? higher qualification ratings may be available shoul d the user have such requirements. please contact your international rectifier sale s representative for further information. ??? higher msl ratings may be available for the spec ific package types listed here. please contact your international rectifier sales r epresentative for further information.
IRS2001MPBF www.irf.com ? 2008 international rectifier 3 absolute maximum ratings absolute maximum ratings indicate sustained limit s beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. recommended operating conditions the input/output logic timing diagram is shown in fig 1. for proper operation the device should be used within the recommended conditions. the v s offset rating is tested with all supplies biased at 15v differential. ? logic operational for v s of -5v to +200v. logic state held for v s of -5v to ?v bs . (please refer to the design tip dt97-3 for more details). symbol definition min. max. units v b high side floating absolute voltage -0.3 225 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc low side and logic fixed supply voltage -0.3 25 v lo low side output voltage -0.3 v cc + 0.3 v in logic input voltage (hin & lin) -0.3 v cc + 0.3 v dv s /dt allowable offset supply voltage transient ? 50 v/ns p d package power dissipation @ ta 25c ? 2.08 w rth ja thermal resistance, junction to ambient ? 36 c/w t j junction temperature ? 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) ? 300 c symbol definition min. max. units v b high side floating supply absolute voltage v s + 10 v s + 20 v s high side floating supply offset voltage ? 200 v ho high side floating output voltage v s v b v cc low side and logic fixed supply voltage 10 20 v lo low side output voltage 0 v cc v in logic input voltage 0 v cc v t a ambient temperature -40 125 c
IRS2001MPBF www.irf.com ? 2008 international rectifier 4 dynamic electrical characteristics v bias (v cc , v bs ) = 15v, c l = 1000pf, t a = 25c unless otherwise specified. static electrical characteristics v bias (v cc , v bs )= 15v and t a = 25c unless otherwise specified. the v in , v th , and i in parameters are referenced to com. the v o and i o parameters are referenced to com and are applicable to the respective output leads: ho and lo. symbol definition min typ max units test conditions t on turn-on propagation delay ? 160 220 v s = 0v t off turn-off propagation delay ? 150 220 v s = 200v t r turn-on rise time ? 70 170 t f turn-off fall time ? 35 90 mt delay matching, hs & ls turn-on/off ? ? 50 ns symbol definition min typ max units test conditions v ih logic ?1? input voltage 2.5 ? ? v il logic ?0? input voltage ? ? 0.8 v cc = 10v to 20v v oh high level output voltage, v bias - v o ? 0.05 0.2 v ol low level output voltage, v o ? 0.02 0.1 v i o = 2ma i lk offset supply leakage current ? ? 50 v b = v s = 200v i qbs quiescent v bs supply current ? 30 55 i qcc quiescent v cc supply current ? 150 270 v in = 0v or 5v i in+ logic ?1? input bias current ? 3 10 v in = 5v i in- logic ?0? input bias current ? ? 5 a v in = 0v v ccuv+ v cc supply undervoltage positive going threshold 8.0 8.9 9.8 v ccuv- v cc supply undervoltage negative going threshold 7.4 8.2 9.0 v i o+ output high short circuit pulsed current 130 290 ? v o = 0v, v in = logic ?1? pw 10 s i o- output low short circuit pulsed current 270 600 ? ma v o = 15v, v in = logic ?0? pw 10 s
IRS2001MPBF www.irf.com ? 2008 international rectifier 5 functional block diagram
IRS2001MPBF www.irf.com ? 2008 international rectifier 6 lead definitions pin symbol description 1 nc no connection 2 hin logic input for high side gate driver output (ho), in phase 3 lin logic input for low side driver output (lo), in phase 4 com low side return 5 nc no connection 6 nc no connection 7 lo low side gate drive output 8 nc no connection 9 nc no connection 10 nc no connection (pin removed) 11 v s high side floating supply return 12 ho high side gate drive output 13 v b /v bz high side floating supply 14 nc no connection 15 nc no connection (pin removed) 16 v cc /v ccz low side and logic fixed supply lead assignments IRS2001MPBF 16l-mlpq 4x4 with 2 leads removed = removed lead 1 2 3 4 5678 9 10 11 12 13 14 15 16 nc hin lin com vs ho nc nc IRS2001MPBF
IRS2001MPBF www.irf.com ? 2008 international rectifier 7 application information and additional details figure 1: input/output timing diagram figure 2: switching time waveform definitions figure 3: delay matching waveform definitions
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IRS2001MPBF www.irf.com ? 2008 international rectifier 14 package details : mlpq 4x4 -14l
IRS2001MPBF www.irf.com ? 2008 international rectifier 15 tape and reel details: mlpq 4x4 - 14l
IRS2001MPBF www.irf.com ? 2008 international rectifier 16 part marking information ordering information standard pack base part number package type form quantity complete part number tube/bulk 92 IRS2001MPBF irs2001 mlpq 4x4-14l tape and reel 3,000 irs2001mtrpbf the information provided in this document is believed to be accu rate and reliable. however, international rectifier assumes no responsibility for the consequences of the use of this inform ation. international rectifier assumes no responsibility for any infringement of pat ents or of other rights of third parties which may result from the use of this in formation. no license is granted by implication or otherwise u nder any patent or patent rights of international rectifier. the specifications mentioned in this doc ument are subject to change without notice. this document supersedes and replaces all inform ation previously supplied. for technical support, please contact ir?s technical assistance center http://www.irf.com/technical-info/ world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105
IRS2001MPBF www.irf.com ? 2008 international rectifier 17 revision history date comment 9/15/09 initial draft converted from so8 data sheet 06/18/2010 included qual info page 11/19/2010 updated pod

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